1. Technical Field of the Invention
The present invention relates to a voltage regulation system for multiword programming in non volatile memories, for example of the Flash type, with low circuit area occupation. More particularly, but not exclusively, the invention relates to a system as above and wherein memories comprise at least a memory cell matrix organized in cell rows and columns and with corresponding circuits responsible for addressing, decoding, reading, writing and erasing the memory cell content, said cells having drain terminals connected to the matrix columns and biased in the programming step with a predetermined voltage value by means of program load circuits associated to each matrix column.
2. Description of Related Art
It is known that in modern non volatile memories, for example of the Flash EEPROM type, the need to apply very “precise” voltages to memory cells in the writing step is increasingly felt. This is generally valid both for writing cells having a grounded bulk terminal, essentially with Vbulk=0, and for negative Vbulk writing.
In practice, the requirements of the voltage difference Vdrain−Vbulk can be compared to the requirements of the voltage difference Vdrain−Vsource.
The term “precise” actually means the observance of the following requirements: it must be ensured that the flash cell, during the writing operation, operates within an optimum operation window, i.e., within a well defined region of the plane Vdrain vs L, where L is the cell channel length. Such conditions ensure, for example, a threshold jump required to pass from an erased cell to a programmed cell in the required programming time.
The parameter L is clearly a statistically variable within an array or a matrix. The more this parameter is centered around a nominal value, the more the process, through which the cell matrix is formed, is reliable.
The second parameter Vdrain will now be analyzed. The need to fall anyway within the optimum operation window involves a reduced tolerance on Vdrain (Vdrain=Vnom±d %) affecting directly the tolerance allowed for the voltage regulator which must generate the drain voltage.
Actually, in present flash memories it is not just one cell which is written, but rather a number of cells comprised between 1 and 64. When the number of cells to be programmed changes, and thus changes the total load current Iprogram, the drain voltage regulator must supply a regulated voltage allowing each cell to operate within the operation window. Therefore, the aim is to succeed in obtaining Vdrain values which are as stable as possible or as little changed as possible when the number of cells to be programmed changes. Ideally, it should be:    Vgate=constant or identical ramp for each cell and for each programming operation. There are no great problems in complying with this requirement since the regulator operates on the Flash cell gate terminals and thus on a high impedance load;    Vbus1=constant identical for each cell and for each programming operation. There are no great problems in complying with this requirement since the regulator operates on the Flash cell bulk and thus on a high impedance load (if the programming bulk current is disregarded being generally far lower than the drain current);    Vsource=0 for each cell and for each programming operation. At first sight this is not a very relevant requirement, but it requires a good layout routing and a good bias the source lines; and    Vdrain=Vnom±d %.
The precision requirement for the voltages involved while programming is even stronger in improved flash devices, as in the case of multilevel flash memories wherein the information to be stored in a cell is no more the one of a single bit (for which it is sufficient to verify if the charge is present/absent on the floating gate) but of a plurality of bits (for which it is necessary to determine indirectly how much charge is present on the floating gate). Inaccuracies on programming voltages contribute to increase the distribution widths of the bits represented by each cell which thus make it difficult or even impossible to determine these levels.
As shown in FIGS. 1 and 2, it is important that the threshold distributions (Vt) of the cells corresponding to the different levels are well spaced from each other in order to make a subsequent sensing easy by using as discriminating voltage (Vr) the voltage in correspondence with the broken lines. Inaccuracies at the programming level would lead the various distributions to get closer to each other and even to cross, thus making a subsequent discriminating operation impossible.
The level distribution in a precise way is a delicate operation which requires a considerable effort as for the memory circuit design. From the physical point of view it is clear that a far lower tolerance on cell parameters is required.
One-to-all/one-to-one regulation. Before facing the regulation problem, it must be immediately said that a design is generally effective if it complies with at least three requirements:    quality;    area occupation; and    production or synthesis time.Actually these parameters are different in importance; the failure of one of them can endanger the whole work. An excellent circuit, synthesized in too long times can become obsolete before it is produced and so on.
The two regulation cases are now described in greater detail. One-to-all regulation is a kind of regulation shown in FIG. 3A. In this case the regulator directly supplies all the cells requiring it (from 1 to Nmax, with Nmax=8−64 or more). The regulator must thus regulate the output of a charge pump, in fact in Flash memories writing voltages are usually obtained internally by means of charge pump positive boosters and with a load varying from:
Bit no.CurrentN=1IprogramNmaxNmax * IprogramWith a current in the range of 100 uA a load change from 100 uA to 6.4 mA can occur, Vdrain=Vnom±d % having always to be kept.
One-to-one regulation is a kind of regulation shown in FIG. 3B. In this case there is a regulator for each cell to be programmed. The regulator must thus regulate the charge pump output with a load being this time constant.
Bit no.CurrentN=1IprogramIn this case the voltage regulation at the value Vdrain=Vnom±d % is far simpler and more precise. Although advantageous under many aspects, this second method has a serious drawback due to the circuit area occupation required by the regulator. This is one of the factors to which significant attention must be directed in modern memories having an increasingly high integration scale.
There is accordingly a need to provide a voltage regulation system for multiword programming in Flash memories, having such structural and functional characteristics as to require a low circuit area occupation.